TY - BOOK AU - Engel, Konrad AU - Kalinowski, Thomas AU - Labahn, Roger AU - Sill, Frank AU - Timmermann, Dirk PY - 2005 DA - 2005// TI - Optimization of dual-threshold circuits T3 - Preprints aus dem Institut für Mathematik CY - Germany; Rostock AB - In this paper, we consider an optimization problem on directed acyclic graphs which is motivated by a standard task in low power VLSI design. With each vertex v of a directed acyclic graph, we associate two delay values d0(v) ≤ d1(v) and two leakage values c0(v) ≥ c1(v). The objective is to choose one of the indices 0 or 1 for each vertex, such that in first instance the corresponding total delay along any directed path is minimal, and in second instance the total leakage is minimized. We prove that a very restricted special case of this problem already is NP-hard, and we present four different heuristic approaches to the problem. Further, we test our algorithms on ISCAS85 benchmark circuits. UR - https://purl.uni-rostock.de/rosdok/id00005895 UR - https://doi.org/10.18453/rosdok_id00005895 DO - 10.18453/rosdok_id00005895 LA - English N1 - Konrad Engel, Thomas Kalinowski, Roger Labahn, Frank Sill, Dirk Timmermann ID - 1987204301 ER -