Optimization of dual-threshold circuits Engel, Konrad , 1956- (VerfasserIn) Kalinowski, Thomas , 1980- (VerfasserIn) Labahn, Roger , 1959- (VerfasserIn) Sill, Frank (VerfasserIn) Timmermann, Dirk , 1957- (VerfasserIn) Text Text 2005 2005 eng electronic resourceremoteComputermedienOnline-Ressource1 Online-Ressource (19 Seiten) In this paper, we consider an optimization problem on directed acyclic graphs which is motivated by a standard task in low power VLSI design. With each vertex v of a directed acyclic graph, we associate two delay values d0(v) ≤ d1(v) and two leakage values c0(v) ≥ c1(v). The objective is to choose one of the indices 0 or 1 for each vertex, such that in first instance the corresponding total delay along any directed path is minimal, and in second instance the total leakage is minimized. We prove that a very restricted special case of this problem already is NP-hard, and we present four different heuristic approaches to the problem. Further, we test our algorithms on ISCAS85 benchmark circuits.<eng> Open Access Urheberrechtsschutz 1.0 Konrad Engel, Thomas Kalinowski, Roger Labahn, Frank Sill, Dirk Timmermann 510 https://purl.uni-rostock.de/rosdok/id00005895 Optimization of Dual-Threshold circuits--(DE-627)494481994 urn:nbn:de:gbv:28-rosdok_id00005895-3 doi: 10.18453/rosdok_id00005895 oclc: 1621843544 ppn: (DE-627)1987204301